| PLDcable IV |
Programmer for Altera PLD devices. Compatible with USB Blaster. |
Features | Supported devices | Connector pinout | Buy PLDcable IV
PLDcable IV is a programmer for Altera PLD devices (CPLDs, FPGAs, and configuration memories), that replaces older parallel port BitBlaster cable. Fully compatible with Altera USB Blaster and Quartus II software. This downloader is available for Windows 2000, Windows XP, and Linux systems and also supports Quartus II Programmer and Quartus II SignalTap II Logic Analyzer. Programmer is connected to PC through USB port, connection with target circuit is done through standard 10-pin IDC connector.
Features
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1.8, 2.5, 3.3 and 5V systems supported
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Supports SignalTap II logic analysis capability
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Supports active serial configuration mode for EPCS serial configuration devices
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Fully Supports JTAG mode
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Fully Supports Passive Serial mode
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Fully compatible with Quartus II software for Windows and Linux
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10-pin Male header
Supported devices
Below is a list of devices supported by the programmer. As new devices appear, the list is going to be modified. The current list is always available in the Quartus II program.
- Download configuration data to FPGA devices
- Stratix II, Stratix II GX, Stratix GX, and Stratix family of devices
- Cyclone II and Cyclone family of devices
- APEX II and APEX 20K family of devices
- ACEX 1K devices
- Mercury devices
- FLEX 10K, FLEX 10KE, and FLEX 10KA family of devices
- Excalibur devices
- Download configuration data to User Flash Memory (UFM) devices
- Download configuration data to EEPROM-based devices
- MAX 3000 and MAX 7000 family of devices
- Perform in-system programming of advanced configuration devices
- EPC2, EPC4, EPC8, EPC16, and EPC1441 devices
- Perform in-system programming of serial configuration
- EPCS1, EPCS4, EPCS16, and EPCS64 devices
Connector pinout

| Pin |
AS Mode |
PS Mode |
JTAG Mode |
| Signal Name |
Description |
Signal Name |
Description |
Signal Name |
Description |
| 10 |
DCLK |
Clock signal |
DCLK |
Clock signal |
TCK |
Clock signal |
| 1 |
GND |
Signal ground |
GND |
Signal ground |
GND |
Signal ground |
| 8 |
CONF_DONE |
Configuration done |
CONF_DONE |
Configuration done |
TDO |
Data from device |
| 7 |
VCC(TRGT) |
Target power supply |
VCC(TRGT) |
Target power supply |
VCC(TRGT) |
Target power supply |
| 6 |
nCONFIG |
Configuration control |
nCONFIG |
Configuration control |
TMS |
JTAG state machine control |
| 5 |
nCE |
Cyclone chip enable |
- |
No connect |
- |
No connect |
| 4 |
DATAOUT |
Active serial data out |
nSTATUS |
Configuration status |
- |
No connect |
| 3 |
nCS |
Serial configuration device chip select |
- |
No connect |
- |
No connect |
| 2 |
ASDI |
Active serial data in |
DATA0 |
Data to device |
TDI |
Data to device |
| 9 |
GND |
Signal ground |
GND |
Signal ground |
GND |
Signal ground |
Download
Buy PLDcable IV
| Price |
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- Programmer
- USB A-B cable
- Cables to connect target device
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| Note: Net prices
Order in our Internet Shop
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