VGA_RAM Project Status
Project File: VGA_RAM.ise Current State: Programming File Generated
Module Name: VGA_RAM
  • Errors:
No Errors
Target Device: xc3s200-5tq144
  • Warnings:
3 Warnings
Product Version: ISE, 8.1i
  • Updated:
Wt 17. lip 09:01:33 2007
 
Device Utilization Summary
Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slice Flip Flops 46 3,840 1%  
Number of 4 input LUTs 133 3,840 3%  
Logic Distribution    
Number of occupied Slices 75 1,920 3%  
Number of Slices containing only related logic 75 75 100%  
Number of Slices containing unrelated logic 0 75 0%  
Total Number of 4 input LUTs 133 3,840 3%  
Number of bonded IOBs 13 97 13%  
IOB Flip Flops 2      
Number of Block RAMs 8 12 66%  
Number of GCLKs 2 8 25%  
Total equivalent gate count for design 525,488      
Additional JTAG gate count for IOBs 624      
 
Performance Summary
Final Timing Score: 0 Pinout Data: Pinout Report
Routing Results: All Signals Completely Routed Clock Data: Clock Report
Timing Constraints: All Constraints Met    
 
Detailed Reports
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentPt 13. lip 16:15:00 200701 Warning1 Info
Translation ReportCurrentPt 13. lip 16:15:06 2007003 Infos
Map ReportCurrentPt 13. lip 16:15:11 200701 Warning3 Infos
Place and Route ReportCurrentPt 13. lip 16:15:21 200701 Warning2 Infos
Static Timing ReportCurrentPt 13. lip 16:15:25 2007002 Infos
Bitgen ReportCurrentPt 13. lip 16:15:35 2007000